Arun V P Design verification Engineer, VLSI
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I am Engineer with a whole lot passion for electronics especially on digital electronics. I have been working with a semiconductor company for the past two and half years. I mainly work on areas where in I use the
verilog, system verilog and uvm as core but I touch other aspects of digital as well. I would love to teach and share my knowledge with people who are seek for it. Thanks in advance.Happy learning!

Teaching style -- Focusing on the basics and then systematically move to larger concepts.
-- Having an interactive question answer session which intent to bring out the most of the students.

Subjects

  • Digital Electronics Grade 10-Bachelors/Undergraduate

  • Verilog Grade 10-Bachelors/Undergraduate

  • AMBA Protocols APB, AHB, AXI Intermediate-Expert

  • Uvm (Universal Verification Methodology) Grade 10-Bachelors/Undergraduate

Experience

  • Design verification Engineer (Jun, 2021–Present) at Capegemini
  • Design verification Engineer (Jun, 2021–Present) at Capgemini
    Hi Learners,
    I am working as Design Verification Engineer, primarily on projects which use UVM methodology. Worked on protocols of AMBA, APB mainly and others as well.

Education

  • Bachelors (Jun, 2015–Jun, 2019) from NCERC,THRISSUR

Fee details

    ₹400–800/hour (US$4.76–9.51/hour)

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