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PravallikaSystem verilog,uvm
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Hi students, I am here to teach UVM and SV from basic with clear examples and assignments. Hope u will sure gain more knowledge from myside. we will do practice question to get good knowledge on SV and UVM. My preparation will help u guys to crack VLSI product company interview and also i will provide all type of interview questions which will help in future. I am exticed to share my skills. I will be waiting for your response students. Make a right decision to explore in this VLSI world . thank you.
Subjects
System verilog Expert
Uvm (Universal Verification Methodology) Expert
Experience
design verification (Aug, 2022–Present) at Maven silicon institution
Education
btech (May, 2018–Jun, 2021) from Jawaharlal Nehru technological University Kakinada–scored 89