Er. Mukesh Kumar Design & Verification Engineer
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"I am a dedicated full-time Verification Engineer with a profound expertise in Verilog,System Verilog, UVM (Universal Verification Methodology), and digital electronics. My passion lies in ensuring the functionality and reliability of digital designs through rigorous verification processes. With a keen understanding of Verilog and UVM methodologies, I excel in crafting comprehensive verification environments and executing thorough test plans. My commitment to staying updated on the latest advancements in digital design and verification allows me to bring cutting-edge solutions to the projects I undertake. Let's connect and explore the realm of digital electronics together!"

Subjects

  • Digital Electronics Beginner-Expert

  • Verilog Beginner-Expert

  • Uvm (Universal Verification Methodology) Beginner-Expert

Experience

  • Verification Engineer (May, 2022–Present) at Modern VLSI
    I am available to teach you Digital Electronics, Verilog,System Verilog, UVM.

Education

  • M.Tech VLSI Design (May, 2022–now) from NIET GR NOIDA–scored 87%
  • B Tech (ECE) (Jun, 2015–Apr, 2019) from G.L.Bajaj Institute of Technology and Management, Greater Noida–scored 74%

Fee details

    ₹1,000/hour (US$11.89/hour)

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