Murali Yanamandala Verilog, VHDL, RTL Coding, Math, Image Processing
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I am Murali, good in teaching the concepts like Mathematics, Physics, Digital Electronics And Hardware Design and Coding. I am Hardware Design Expert(Coding & Validation), with over 8 Years of Experience. I do ensure the students, who are taught, as I give more importance to their understanding. I do have good communication skills and also leadership skills. I give more importance to practical understanding than only theory oriented, I use many examples to ensure students understanding. I give importance to clearing the doubts of the students. I am also easily approachable to Students. Finally I do have working experiences with Premium organizations like Intel, Xilinx(now AMD), Analog Devices, Samsung.

Subjects

  • Verilog HDL and VHDL Beginner-Expert

Experience

  • FPGA Lead (Jul, 2022–Oct, 2022) at INTEL Bangalore
    Training the team, On-site Discussion, Work Schedule plan for 6 Months, RTL Design.
  • Senior Engineer (Sep, 2021–Jul, 2022) at Einfochips bangalore
    ETL Design, FPGA Validation, FPGA Design, Verification of Design, PCIe Protocol, DSR4 Protocol, Verilog Coding,
  • Member of Technical Staff (Aug, 2019–Aug, 2021) at Mirafra Technologies, Bangalore
    Working at Client Side, Samsung, Analog Devices India, Xilinx
  • Senior Design Engineer 1 (May, 2018–Nov, 2018) at Xilinx India
    Video Subsystem Design and Validation, SDI, DP Port
  • R & D Engineer (May, 2015–Apr, 2018) at Logic Fruit Technologies Pvt. Ltd.
    Video Surveillance Algorithm Development, Research, FPGA Design and Validation, Ethernet Protocol.
  • FPGA Design (Jun, 2014–Nov, 2014) at Ancor Research Labs
    SDR
  • Project Associate (Oct, 2013–May, 2014) at IIT Hyderabad
    FPGA Design and Lead of Ultrasound team.

Education

  • Master of technology (Nov, 2010–Oct, 2012) from Madanapalle Inst of Technology and science, madanapalle–scored 76

Fee details

    ₹1,200–5,000/hour (US$14.27–59.46/hour)

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