Shyam G VLSI Engineer, Expert in Verilog,VHDL, Digital ele
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Good understanding of the ASIC design flow.
 Good knowledge in Digital Electronics, CMOS Technologies &
Static Timing Analysis
 Good knowledge in Hardware Descriptive language ie. Verilog
HDL, VHDL
 Experience in Development of IP level Verification platform using
System Verilog and UVM.
 Good knowledge in verification methodologies
 Experience in using industry standard EDA tools for front-end
design and verification.
 Good understanding of object-oriented programming concept of
System Verilog.
 Verification using System Verilog Assertions and Coverage
modules.
 Constraint Random Coverage-driven Verification.
 Familiar With Linux shell scripting, Perl & Python
 Hands-On Working experience on FPGA Board Xilinx Spartan
3E, Virtex 4, Zynq Board.
 ISE- Xilinx ISE 14.7, Vivado.
Good knowledge in Electronics Devices, Analog Electronics, Control Systems
Good Knowledge in Charecterization and Modelling of Digital circuits
Good Knowledge in Spice Simulations.
Good Knowledge in Circuit design and Simulation
Good Knowledge in Layout Design and Debug
Good knowledge in Computer Architecture and Organization.
Good Knowledge in Scripting Linux, Perl, Python
Tool Knowldge: Cadence Virtuoso, Tanner, Finesim, Primetime, Hspice, Silicon smart, Liberate, Matlab,Verdi-VCS,and Other EDA tools
Good knowledge in Computer devices and Software debug.
Good Knowledge of MS-Office suit (Powerpoint,Word,Excel & other tools)

Subjects

  • Engineering Maths Beginner-Expert

  • MS Office Beginner-Expert

  • MS Excel Beginner-Expert

  • VLSI and CMOS Beginner-Expert

  • Computer network Beginner-Expert

  • Digital electronics design Beginner-Expert

  • Digital Electronics and Analog Electronics Beginner-Expert

  • Verilog HDL Beginner-Expert

  • Linux operating systems (Linux internals and kernel) Beginner-Expert

  • Computer Architecture and Organization Beginner-Expert

  • Aptitude for placements Beginner-Expert

  • VHDL/Verilog Beginner-Expert

  • Scripting Beginner-Expert

  • Circuit Analysis Beginner-Expert

  • Electronic Circuit Simulation (Any Software) Beginner-Expert

  • CAD for VLSI Design Beginner-Expert

  • CMOS Digital Circuit Design Beginner-Expert

  • 8086/8088 Hardware specifications 30 Memory interface 6/1 Beginner-Expert

  • Circuit Design & Modelling Beginner-Expert

  • Standard cell design and characterization Beginner-Expert

Experience

  • Tutor (Jul, 2019–Present) at Teachmint
    Taking Classes on Verilog,VHDL, System verilog and all other courses related to VLSI/Semiconductor domain.
  • Semiconductor Professional (Jan, 2018–Present) at Lets Learn VLSI

Education

  • PG-DVLSI (Aug, 2018–Jul, 2019) from CDAC-ACTS–scored A++

Fee details

    ₹1,000–5,000/hour (US$11.79–58.96/hour)

    Charges will vary based on course/ support you needed.

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