Sumair Fabregas Passionate Math Teacher
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Level of Improving the Learning Curve,along with that work,Implement and Execute Real time projects,and help the Students it to reach new Astronomical Heights.

Worked as a Trainee in CoreEL Technologies,and was trained on FPGA Design,and IDE Xilinx Vivado,Worked,Built Projects on Latest FPGA 's like Zedboard. Kintex Board,and Exposed to Verification Methodologies like System Verilog,UVM,and got placed post my Excellent Performance in Training.

A company called Vedang Radio Technology,where i was working as Associate FPGA engineer,Since i Was working in the Research and Development Sector,i was exposed to Many Technologies,and worked on a Project called SDR(Software Defined Radio),was part of Designing,simulating,Synthesis,Implemenation,and testing the RTL cODE ON THE FPGA Board.

i feel with this Experience and exposure,i can pass on my Knowlege,to other ambitious people who want to Enter in the Field of VLSI Domain,and give the most adequate training that is required based on Industry Standards.

Also will give the Students a Step by Step approach on how to design and understand the RTL Flow.

Subjects

  • Maths (12th)

  • Maths (Algebra) Expert

Experience

No experience mentioned.

Education

  • B.E (Jun, 2013–Jul, 2017) from M.S engineering college Bangalore

Fee details

    ₹1,000–3,000/hour (US$11.60–34.81/hour)

    Since this is a Niche Domain,and iam a professional,the charges may vary.

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