Hi students,
I am here to teach UVM and SV from basic with clear examples and assignments.
Hope u will sure gain more knowledge from myside. we will do practice question to get good knowledge on SV and UVM. My preparation will help u guys to crack VLSI product company interview and also i will provide all type of interview questions which will...
With a deep understanding of VLSI design and verification flows, I focus on simplifying complex topics and providing real-world examples to make learning engaging and practical. Whether you're a beginner looking to start your professional journey or an experienced professional aiming to enhance your skills, my sessions are tailored to meet your...
1.diffrent way of teaching
2.share my knowledge with easy way of teaching with examples.
3.delivery 100% content what I know with effient manner
4.students can understand with my visual presentation
5.coding with analysis and how the code run, execute and moreover debugging
6.suffient practice examples i will teach.
7.real time basic...
I completed VLSI design and verification training.I have done some industry oriented projects.
I am able to code design using verilog. And i can verify them using system verilog and UVM . I have good knowledge on protocols.I can develop various test benches for the designs.I am interested to share my knowledge.
I start my lectures starting from...
I have completed my graduation at SNIST specializing Electronics and Communication engineering and I have prepared well for GATE.Subject learning is my first priority.I have been learning,teaching and upgrading myself dailyI have taught for 8th,9th classes and coming to engineering I taught M1,M2 and almost all core subjects of EC and solved many...