Online CAD for VLSI Design tutors in Delhi

Good understanding of the ASIC design flow.
 Good knowledge in Digital Electronics, CMOS Technologies &
Static Timing Analysis
 Good knowledge in Hardware Descriptive language ie. Verilog
HDL, VHDL
 Experience in Development of IP level Verification platform using
System Verilog and UVM.
 Good knowledge in verification methodologies
...

I am Aakanksha Verma pursuing PhD in VLSI Design from Indian Institute of Technology Roorkee. I completed M. Tech in VLSI Design from Dr. B R Ambedkar National Institute of Technology Jalandhar. I completed B. Tech in Electronics and Communication from Mahatma Jyotiba Phule Rohilkhand University Bareilly. I completed 11 months internship from...