An RTL and FPGA design engineer having working in corporate in last 3 years.
Associated with various Projects related to digital design ASIC/FPGA.
HDL Languages known : Verilog,VHDL
Protocols like : I2C,SPI,UART, Amba Protocols APB,AHB,AXI protocol.
Projects done : MIPI Alliance version 3
Made Microarchitecture Design for master and slave...
My name is Vinod Chaudhary.i am mathematics expert teacher for higher level and I currently teaching math related subject.I taught more than 500 student in Delhi Noida Gurgaon Ghaziabad.I have good communication skills and I will provide best tricks of students.I teach IB math, Engineering math, Engineering mechanics,Engineering physics, Sat Math,...
An engineer with a passion for helping students learn about technology. My interests include microprocessor design and digital electronics right from gate-level design up to HDL level processor specifications.
I can help you understand various aspects of computer architecture, memory management, Operating system concepts and the way they fall...