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Verilog home tutors in Sector 12
- Sushil Kumar Fpga/RTL design engineer
An RTL and FPGA design engineer having working in corporate in last 3 years.
Associated with various Projects related to digital design ASIC/FPGA.
HDL Languages known : Verilog,VHDL
Protocols like : I2C,SPI,UART, Amba Protocols APB,AHB,AXI protocol.
Projects done : MIPI Alliance version 3
Made Microarchitecture Design for master and slave...
- Gaurav Gupta Graduate Engineer
An engineer with a passion for helping students learn about technology. My interests include microprocessor design and digital electronics right from gate-level design up to HDL level processor specifications.
I can help you understand various aspects of computer architecture, memory management, Operating system concepts and the way they fall...