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Digital design and Verilog HDL home tutors in Gaur City 2 Road, Gaur City 1
- Sushil Kumar Fpga/RTL design engineer
An RTL and FPGA design engineer having working in corporate in last 3 years.
Associated with various Projects related to digital design ASIC/FPGA.
HDL Languages known : Verilog,VHDL
Protocols like : I2C,SPI,UART, Amba Protocols APB,AHB,AXI protocol.
Projects done : MIPI Alliance version 3
Made Microarchitecture Design for master and slave...