An RTL and FPGA design engineer having working in corporate in last 3 years.
Associated with various Projects related to digital design ASIC/FPGA.
HDL Languages known : Verilog,VHDL
Protocols like : I2C,SPI,UART, Amba Protocols APB,AHB,AXI protocol.
Projects done : MIPI Alliance version 3
Made Microarchitecture Design for master and slave...
Expert in Verilog, Digital Design System, Perl scripting/programming,System Verilog can teach you from the beginning to the advance level.
I’m committed to not only using my knowledge and skills in the classroom, but also and more importantly, to be an integral part of my student’s development. This sincere interest in the pupils’ personal growth...
PhD Researcher and Scientist. RTL Design with VHDL/Verilog, FPGA, SoC, VLSI design, Linux, Assembly Language, Arduino microcontroller board, STM32, MATLAB and Networking, can help you with pretty everything right from Grade 1 to Undergraduate level. Has a teaching approach tuned according to the learner, and helps bring out their potential....